AMD's next processor architecture now has an official date. AMD has confirmed that Zen 6 will launch at its "Advancing AI" event on July 22–23, 2026 in San Francisco — and the first product crossing the line is EPYC Venice, the 6th generation of AMD's server CPU lineup.
EPYC Venice: The Specs
EPYC Venice tops out at 256 cores per socket — a 33% jump over the 192-core EPYC Turin it replaces. It's built on TSMC's 2nm process node, making it AMD's first high-performance CPU to reach that density. AMD claims the combination of architecture improvements and the new process delivers up to 1.7× the performance and 1.6 TB/s of memory bandwidth versus the previous platform.
Venice is designed to slot into AMD's Helios rack-scale AI platform, working alongside AMD Instinct MI455 GPU accelerators and Pensando networking hardware. The intent is clear: AMD wants Zen 6 to be the CPU layer in full-stack AI infrastructure, not just a faster server chip.
Consumer Zen 6 Is a 2026 or 2027 Story
For desktop and laptop users, the July 22 date is a preview, not a purchase opportunity. AMD has stayed quiet on when Ryzen-branded Zen 6 chips will arrive on the AM5 platform, and current signals suggest late 2026 at the earliest — with CES 2027 as a realistic target for a full consumer launch.
This isn't unusual for AMD's roadmap. EPYC consistently reaches new process nodes and microarchitectures ahead of consumer Ryzen chips, partly because enterprise margins support earlier deployments and data center customers have contracted timelines. Still, desktop users who have been holding AM5 platform upgrades in anticipation of Zen 6 should plan for a long wait after Thursday's announcement.
The AI Framing
AMD calling this the "Advancing AI" event — rather than simply a product launch — reflects where data center revenue is moving. The hyperscale AI infrastructure buildout (training large models, running inference at scale) is consuming enormous quantities of silicon, and general-purpose CPUs risk being marginalized if they can't prove their value in that workflow.
AMD has taken significant server market share from Intel over the past three years with EPYC. Venice's core count advantage and its 1.6 TB/s memory bandwidth — crucial for large model inference — are the arguments AMD will make to keep that momentum. Intel's Xeon 6, which launched late last year, is the direct competition, along with the growing wave of Arm-based server chips from Ampere, AWS Graviton, and Qualcomm Oryon for cloud workloads.
Whether Venice's performance claims hold in production workloads, and how quickly AMD can ramp supply for a 2nm chip, will become clear shortly after the event. Six days from now, the Zen 6 era officially begins — for servers, at least.